Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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The India RFP. There are a couple of clues regarding the activities to support the RFP.

 

From the SCL annual report (found by Andech):

Integrated Opto-Electrical Technology for IR Imaging: SCL is acquiring GaAs based technology for imaging applications. The technology will encompass imaging through complete monolithic Infra Red Focal Plane Array (IRFPA), IR transceiver employing lasers as well as lasers for illumination applications. Tendering process for the technology transfer is underway.

And

New Facilities 6 ” Wa f e r F a b L i n e E x p a n s i o n : Commensurate with process up-gradation needs, 6” Wafer Fab-Line expansion is in progress. Clean rooms and other support utilities in the available space contiguous to the existing 6” Wafer Fab Line, are being set up for installation of the Process equipment identified to augment the 6” Wafer Fab Line. MOCVD Facility: For the proposed Metal Organic Chemical Vapour Deposition (MOCVD) system, Cleanrooms and associated utilities are required to be established for which existing available buildings have been identified. Design & technical specifications for installing Class 100/1000 Cleanroom and Utilities distribution to support the MOCVD facility was completed and tendering process is in progress.

In the original Expression of Interest (the pre-bid conference) The question was asked what line would be used.

Answer: It is planned to use the existing 6” fabrication line for the technology under discussion. There shall not be a separate fab line.

In Phase 1 externally sourced wafer epi stack is used.

The tender details

Eligibility Criteria and Scope of Work:

 

Phase 2: In the second phase of the project, the manufacturer shall grow requisite epitaxial stack(s) in SCL fab. The grown epitaxial stack shall be used for demonstration of device level performance similar to those in phase 1. Using this/these epitaxial stack(s), technology demonstrator circuits shall be developed. These will include QCW VCSELs, opto -electronic transceivers, solar cell tiles, individual MWIR photodetector pixels and photodetector arrays. As part of this phase, the manufacturer shall develop and provide process development kit (PDK) for SCL fab line. As a part of this phase, the manufacturer shall also provide a preliminary architectural design of the read -out integrated circuit (ROIC).

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