Excellent information presented Oz. I don't have the time to go over the presentation of IMEC's process in detail but there are so many areas of increased efficiencies enabled by POETs dielectric that allows for an architecture that takes full advantage of those properties. 

The separation of thermal profiles between the optical side and electronic side. 

I noted that the insertion loss for Imecs silicon is 4 times higher than POET. 

The dielectric is the secret sauce that is designed to allow efficient manipulation of light while it has the ability to be included in the silicon process at low temperatures without impacting the electronics.

POET was able to look at the dielectric and use it in ways that provides the greatest interoperability’s with silicon without compromising the optical functionality. Separate material sets that can be optimized independently and assemble by machines with high accuracy.