Some very creative minds at work. This patent addresses the alignment of the active optical dies onto the processed wafer containing the sub-mounts.  Both the dies and the wafer contain die mating features which are basically very precise stops that sets the alignment in  both vertical and horizontal (Z,X,Y)planes.   

So the active dies produced by the new DenseLight owner (and/or Almae and/or other) contains mating features which enable very precise passive alignment onto the wafer at the foundry.

In the example provided in the patent 1000 dies are attached to the wafer.

The steps:

The dies are placed onto the wafer one at a time into a starting position in contact with the solder bumps. Placement of the dies takes 1 second each. = 1000 seconds

Once each die is in a temporary position (roughly aligned to the stops/mating features) the first portion of the solder bump is melted fixing the die in place. 6 seconds per die = 60000 seconds

Next step is to align all dies at once with a reflow step of the solder bumps. The dies slide into the final position of alignment based on the position of the precise mating features (the vertical and horizontal stops). The reflow step takes 60 seconds to basically float the dies into place for a permanent passive alignment.

The dicing takes 1 second but before that happens the dielectric is applied and the waveguides and passive features for associated with filtering for the application being built is applied.

In the entire water level die attach process for 1000 die takes 8,059 seconds or 2.23 hours. In comparison using a die level attach process would take 8.05 hours.

Hence, the wafer-level semiconductor die attachment method saves almost 72% of time in comparison to  the conventional semiconductor die attachment method, thereby reducing the cost of optoelectronic packaging and improving the process efficiency and process throughput.