Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Bill Ring co-Chair at PIc

Is it possible that LWLG and POET are partnering now??

I would think it is possible. As I recall POET does use a polymer layer which they apply presumably as a cladding for negative refractive index control and/or for modal adjustment at insertion interfaces.

LWLG has had a recent breakthrough in thermal stability which has always been an area of concern for polymer.

The improved thermally stable polymer has more than double the electro-optic response of the Company’s previous materials, enabling optical device performance of well over 100 GHz with extremely low power requirements

Which leads me to another topic. Suresh’s work with Global  Foundries particularly associated with efforts towards monolithic integration of RF has led to disaggregation approaches. Focus on building the devices in the material set that best suits the device and then figure out the best way to connect those best devices. That is  what he has done with the Optical  Interposer. When I read the article regarding Ayer Lab’s I was astonished to see that the operating temperature of the chip  set is 125’C. Optical elements are very sensitive to temperature variations. It can cause very significant changes in refractive index causing dramatic shifting of  the wavelength. So  the issue with tight integration of silicon processors with optical  functions is basically counterintuitive from that perspective.

What this means to  the Ayer Labs approach is  that heaters are required to  keep  the chipset  at 125’C. In the early demonstration when this  approach was demonstrated in “Nature” turning off temperature control had an immediate impact on bit  error.

https://www.youtube.com/watch?v=JAe_xQyFI4k

I think it demonstrates that the approach that Suresh has taken to separate temperature profile and allow for efficient heat sinking of the active optical components provides significant benefits.  

Also I found one of my old posts on the benefits that POET’s  dielectric provides for thermal  induced refractive index compensation:

https://agoracom.com/ir/POETTechnologies/forums/discussion/topics/695219-not-all-athermal-waveguides-are-created-equally/messages/2164645

Actually when I  read what I wrote about Suresh's approach I should  add that he has also  used the most advanced wafer level  integration approach that exists today for electrical  inerconnection of  chip sets and applied the Optical Interposer into that process. The best of  both worlds.

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