POET’s Optical Interposer enables Hybrid Integrated Photonics Packaging with a unique material set and geometry that allows the manipulation, transmission and connection of light combined with the transmission and connection of electricity on the same fabric. This has allowed POET to use the interposer in a way that greatly improves electrical and thermal performance, power consumption and form factor of the photonics sub-assembly.

Wafer-level integration into silicon

Waveguides formed and integrated with embedded passive optical components (spotsize converters (SSCs), mux-demux, filters, waveguides) at chip level

Ultra-low loss waveguide dielectric with high coupling efficiency

Pick and place assembly and passive alignment of components

Elimination of lenses and active alignment

Athermal waveguide dielectric allows multi-channel scalability

Wafer-level hermetic sealing, testing and burn-in of active components to produce known good die

Small form factor and platform architecture readily scalable

High frequency metal traces managed in the dielectric platform

Fully compatible with conventional CMOS processing allowing integration with complex electronics at chip or module level

Compared to semiconductors, where packaging accounts for 10% of the final die cost, packaging and assembly is generally 80-90% for a photonic die. POET’s Optical Interposer provides a new approach to photonics packaging and assembly that could allow more functionality to be integrated into a single package, similar to the system-in-package (SiP) trends observable in the industry today. POET’s Optical Interposers offers a disruptive approach that leverages existing high-throughput microelectronic tools and techniques to assemble cost efficient and scalable single-mode optical components.

The competition

A major challenge in monolithic integration is that process optimizations for photonics and electronics cannot be performed independently of each other. As such, the transistors in monolithic platforms tend to derive from older CMOS processes, where transistor properties are not so sensitive to fabrication changes for photonics. For instance, adding epitaxial Ge to the process requires front-end process modifications that can more easily be tolerated in old CMOS nodes above 90 nm (Table. 2). Such front-end process modifications are significantly more challenging in more advanced process nodes with higher performance transistors. Furthermore, old CMOS processes do not have enough lithography precision for building high quality ring-resonators with good coupling and relative resonant wavelength control required for dense wavelength division multiplexed (DWDM) applications, and consequently transmitters use Mach-Zehnder modulators (MZM) which are much less area and energy efficient.

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POET’s transceiver Optical Engine architectures, based on the Optical Interposer, involve the passive placement of multiple optical die comprising of light source arrays, modulator arrays and detector arrays. Wavelength determination and selection functions, previously supplied with additional chips, can now be incorporated into the Optical Interposer at virtually no additional cost.

Again

Wavelength determination and selection functions, previously supplied with additional chips, can now be incorporated into the Optical Interposer at virtually no additional cost.

By utilizing both an external cavity laser and an externally modulated source, the Optical Interposer architecture enables a low-cost structure for all of the current 100G standards – PSM4 MSA, CWDM4 and LR4. The gain chip arrays, PIN arrays and modulator arrays are common across the architectures – with the differences in the design of the gratings and the multiplexer/de-multiplexer on the Optical Interposer. This dramatically simplifies the BOM and modalities that need to be manufactured/tested/qualified across the different physical media descriptions (PMDs) for the different applications.

The Optical Interposer is agnostic to speed and is able to accommodate additional channels in a straightforward, low-cost manner. Since there are no micro-optics involved and the need for active alignment has been eliminated, the Optical Interposer can scale from 4 channels to 8 channels with only small increments of size and cost. This simplifies the transition from 100G to 400G in transceiver modules while maintaining an attractive cost structure for transceiver module suppliers.

There are many advantages to POETs platform but I always come back to what I believe is the most significant change that sets POET apart from everyone in terms of performance. That is the ability to place the PIC dies adjacent to the electronic dies instead of on top of the electronic dies which require TSV's (Luxtera). This provides a dramatic change to thermal efficiency and in combination with the athermal characteristics of the dielectric waveguides it allows for very accurate wavelength tuning and allows for the expansion of the applications with increasing data capacity through the addition of multiple PIC connections to  meet future optical engine needs. All the filtering needs are performed by the interposer which could never be done in a typical conventional 3d configuration.  

And let us not  forget that this is  all  done with the lowest insertion and waveguide loss in the industry in a CMOS fabrication flow.