ITTR,

As Oz pointed out, Juniper's approach is based on Aurrion's tech. This company was started in 2008 to work on tranceiver designs. Their goals were identical to Poet's: silicon photonics, heterogeneous solutions, wafer scale testing and passive alignment.

This 2013 article shows Aurrion's concept (see the picture at the top of page 38).

http://content.yudu.com/A29zih/CompSemiJul13/resources/36.htm?skipFlashCheck=true

This link seems to show the same state of the tech in 2016

https://www.theregister.co.uk/2016/08/03/juniper_networks_grabs_silicon_photonic_developer_aurrion/

The difference is instead of an optical interposer to move optical signals from one chip to the other, they directly bond InP material to the silicon chip on top of a silicon waveguide, etch it down so it is relatively flat on top of the Si chip, use lithography to build InP devices and then deposition to form interconnects.

I believe ths is what the Juniper CEO is referencing. He is still speaking in 2020 of the development as "...that is not easy. There are a lot of technical hurdles to get in the way." Since they were working on this since at least 2013 (maybe 2008) you can see what he means. He is saying he hopes to get products out before the end of the year. While this seems to align with POET, I believe that this really aligns with the 400G rollout that everyone is shooting for. 

While this tech shares many features that the POET OI does, I think the bonding step and etch down must be complicated and more costly than POET just bumping two chips together with stops. It also probably is going to be harder to do co-packaged optics in the future for the same reason.

Suresh said there would be competition and that is just a sign you are going after the correct market. I think Juniper is not in our camp... yet.

rogue