Thanks OT

A quick scan through the document indicates the invention uses silicon waveguides which, according to SV, are NOT compatible with CMOS.  Further, the patent states that "although monolithic co-integration of CMOS and silicon photonics in the same fabrication run seems attractive, the yield and required technological compatability challenges make it impractically expensive."

Instead, this patent uses combination OI on one or more electronic dies, coupled together with an optical electronic printed circuit board (OE-PCB), therefore would appear it lacks the efficiencies seen in the POET OI platform which uses a dielectric waveguide (non-silicon) and posesses full CMOS compatability.

All IMO, of course.  btw, I don't claim to be an expert on the subject, feedback and alternate interpretations are definitely welcome!