She is talking Suresh’s language specifically around the need to reduce the cost of multiplexing. As we know POET is the only company that has successfully integrated CWDM in a CMOS fabrication flow.
As stated: The complexity of optics is the cost driver. Focus on optics is front and center of the economics. Innovations to bring the cost of optics down. Specifically the ability to multiplex lower speed lanes into one higher speed for both 100G and 400G (Bingo, she referenced both 100G and 400G). POET is the first to produce wafer level filtering that meets/exceeds CWDM standards with 4nm spacing.
The silicon side was waiting for the optics to catch up. Has POET bridged that gap for CISCO? I think POET is the innovation she is talking about to lower costs.