When we were first told about the light engine it was billed in part as a move that would introduce and highlight some of the capabilities of the optical interposer platform. It gave the silicon photonics industry the ability to efficiently integrate a light source into silicon. 4, 8 or even up to 16 lasers are pre-aligned for direct insertion into silicon.

Fast forward to today. Intel clearly identifies their progress or lack of progress to provide switches ASIC Co-Packaged Optics with an efficient light source. That is right Intel the world's largest and highest-valued semiconductor chip manufacturer has not figured out how to do this. People used to say “how can POET compete with the might and the technical expertise that is Intel”. The answer to that is Suresh.

So POET has a solution to the  problem of how to get light into the silicon  ASIC with  industry  leading light coupling efficiency while at the  same time allowing for laser replacement which is the major source of optical module failures. An answer to a big problem confronting the optical needs for increasing switch capacity of the data center roadmap. And it is doing this at low cost wafer scale.

If ever there was a way to introduce the POET platform I think finding a solution to meet those requirements is a strategic move that has caught the attention of industry analysts as demonstrated in the recent industry publications.

So how long will it be before the silicon industry embraces the advantages offered in the full blown POET optical interposer platform? Suresh touches on this in the following remarks:

We think that the big pinch point, or pain point, has been the coupling of lasers. And that’s the problem that we’ve solved. One of the problems that we’ve solved with the interposer. There are others. So, we are kind of trying to monetize that aspect of our development with this Lightbar family of product. But we do expect fully integrated TxRx optical engines and some other products to be coming out over the next couple of months.

We’re assembling hundreds of chips at wafer level and still being able to achieve the level of performance that people have not been able to achieve so far.