Hi tradergader,

I know the question was directed to David, but I know the answer.

POET stated (as early as the 2011 AGM in Toronto, I think) that POET is capable of using a FinFET approach if necessary.

Keep in mind though, FinFET was a concept developed decades ago. It was only put to use when CMOS needed help overcoming lapses in scaling. POET isn't in need of such a workaround just yet.

In fact, from some of the comments I've read/heard from Taylor they don't intend to play the same scaling game. Granted, Dan DeSimone remarked that one advantage POET has is that the road to smaller feature sizes has been paved by Intel et al, and that some of the same roadblocks are going to be predictable far in advance.

Nevertheless, Dr. Taylor is even looking beyond this. True, he imagines that there is no fundamental barrier in shrinking the gates to 15nm or 10nm, so he must be envisioning such a future for POET. But even better than this, he continually seizes the opportunity to mention the possibility of the single electron transistor to enable quantum computing. He even describes this as making use of the quantum effects that are currently viewed as a challenge for scaling Si CMOS. He has been able to take a disadvantage for CMOS beyond 2015 and has in fact made it a feature of POET.

How brilliant is this guy!