New Method Cuts Cost of GaAs Circuits

LAKE WALES, Fla. -- A new copy/paste method for mass production of expensive circuits has just been invented at the Massachusetts Institute of Technology (MIT). After the fabrication of a "donor" wafer topped by graphene, the technique uses a deposit-and-peel-off (copy/paste) method that reduces the cost of the circuitry and makes the cost of the underlying wafer relatively insignificant. The technique could encourage manufacturers to combine silicon (Si) with expensive materials, like gallium arsenide (GaAs) for transistor channels, very easily and inexpensively.

(left to right): Post doc Kyusang Lee, professor Jeehwan Kim (sitting), and graduate students Samuel Cruz and Yunjo Kim. 
(Source: Jose-Luis Olivares/MIT)

 

"We are taking advantage of the strength and slippery qualities of graphene, rather than its electrical properties, in order to fabricate extremely thin circuits of expensive materials, thereby greatly reducing the overall cost of using exotic materials," professor Jeehwan Kim told EE Times in an exclusive interview before the public announcement of his "remote epitaxy" technology.

Today many semiconductor researchers are struggling with, for instance, growing GaAs transistor channels on silicon wafers for transistor channels, ending up with low quality results because of the lattice mismatch between silicon and GaAs, according to Kim. However, using remote epitaxy, those GaAs channels can be separately fabricated on a thin layer of GaAs peeled off the graphene-topped donor wafer and bonded to the silicon wafer without any problems with lattice mismatch.

The researchers fashioned the donor wafers by merely depositing a single-atom thick monolayer of graphene. Because graphene bonded to the donor wafer, but is “slippery” on top, a thin layer of an expensive material can be fabricated atop the stack which does not stick to the donor wafer. Kim's group members then simply peel the expensive top semiconducting layer from the donor wafer and transfer it to an inexpensive substrate, such as Si. The substrate can even be patterned already with the source and drain in silicon, then etch to add the GaAs channels to its otherwise CMOS circuitry. And with no lattice mismatch problems, the resulting silicon transistors with GaAs channels will outperform any silicon channel transistors used today.

Light emitting diodes (LEDs) being grown on graphene and then peeled off for placement on another substrate. 
(Source: MIT)

 

Because graphene is 600 times stronger than steel and bonds strongly to the underlying donor wafer, the process can be repeated over-and-over, like the steel mold used to mass produce rubber car tires, giving graphene a leg-up on the mass production of CMOS wafers combined with exotic materials. The exotic materials can also be used by themselves for LEDs, solar cells, high-power transistors or other devices. The team claims not to have yet found a limit on how many copy-and-paste operations can be performed by a single donor wafer.

Kim's team perfected the method at MIT’s Research Laboratory of Electronics with the help of doctoral candidate Yunjo Kim, graduate students Samuel Cruz, Babatunde Alawonde, Chris Heidelberger, Yi Song, and Kuan Qiao, postdoctoral researchers Kyusang Lee, Shinhyun Choi, and Wei Kong, visiting research scholar Chanyeol Choi, MIT Professor of Materials Science and Engineering Eugene Fitzgerald, professor of electrical engineering and computer science Jing Kong, and assistant professor of mechanical engineering Alexie Kolpak, along with contributors from other universities including Jared Johnson and Jinwoo Hwang from Ohio State University, and Ibraheem Almansouri of Masdar Institute of Science and Technology.

The team has proven the feasibility experimentally of lowering the cost of using exotic materials, including GaAs, indium phosphide, and gallium phosphide. They have also transferred the exotic active layers onto cheap flexible substrates, successfully fabricating light-emitting diodes there.

A nickel film peel-off from a silicon wafer demonstrates the concept of using a 2D material-based transfer process for wafers. 
(Source: Jose-Luis Olivares/MIT)

 

Next they plan to try the technique on clothing and other wearable materials, as well as attempt to stack multiple layers to create more complicated devices.

Funding was provided by the One to One Joint Research Project between the MI/MIT Cooperative Program and LG electronics R&D center.

— R. Colin Johnson, Advanced Technology Editor, EE Times