In the end I think POET will emerge in products that require a 3D-type form factor, but also in large planar designs - depending on the device.

This is my own far-futuristic opinion, but I've imagined POET chips which are flat and nearly the size of a whole wafer. If POET is going to integrate all the functionality of several chips into one and be placed in a cell phone, it would be great to have a flat chip rather than a bulky 3D chip, since the screen will determine the form factor of the device. The chip itself could be much larger than ordinary chips and still take up less space inside the phone, because they won't consist of separate chips mounted on a board.

Why do we dice chips into smaller pieces anyway? Mostly it's because various companies are responsible for expertly designing chips for different purposes. I know wafers are round and that smaller chips create less waste than larger ones. I also know that in my scenario any defect could basically render the whole device inoperable. But POET has said that GaAs materials used in our process are recyclable. Besides, I think the cost of buying and then bonding chips to a circuit board would add more cost than the odd failed wafer run.

So in my scenario, all the processor/memory/storage/radio data will move within this larger multifunction chip. This chip would connect to a USB-type (or other) input/output to connect with other devices, and of course a power supply. In this way, you could almost imagine that a chip wouldn't require a circuit board at all! POET may benefit from a board containing waveguides for fast optical communication to distant parts of the large chip, but with minimal packaging the cost of POET would be tiny compared to the current silicon environment.

I think if this environment ever evolved it wouldn't necessarily destroy the industry, because companies would still design separate areas of the chip, and license them. But in the end, the manufacturing at the fab would put all the licensed designs together at the wafer level, sidestepping the circuit board.

Where 3D designs might be needed is in desktops (if they are still around) and data centers. There are so many components that might need to be swapped out when they fail that a modular setup might be preferable. Also, size isn't really a factor the way it is in mobile devices, so a 3D stacking of chips might be more feasible.

I'm obviously thinking way beyond the "low hanging fruit" we are likely going after right now, but I think this is the kind of thing that will attract new investors to POET for the long haul if existing companies begin to validate our technology starting next year.