Did anyone took the time to look at Marvell's invited paper that will be published in the IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS ????

Some key sentences that I truly believe that POET could run miles on it:

1) Integration is essential for manufacturing higher speed and performance component

--> POET's chiplet will bring ease of manufacturing at lower costs and it can scale. 

2) Higher levels of integration also allow for closer placement of devices which minimizes the parasitic power consumed to compensate for the frequency dependent losses in the interconnect traces

--> Go look at POET's PAM$ signaling eye diagrams, how clean is that signal ???

3) A large contributor to the total module power consumption is the host electrical interface. With integration, as the optical modules get smaller and are co-packaged with electrical host ASIC, the power at this interface can be reduced. With even tighter integration, we may not need a DSP inside the optical module, and it can be directly driven by the host ASIC

--> Did Suresh made allusion to that during Synoptic's symposium ???

4) The cleanest, from the high-speed packaging point of view, is the last row in Fig. 4, where the silicon photonics device is also an interposer with TSV’s, and the assembly is completely free of wire bonds.

--> Just like POET's optical interposer, TSV eliminates wire bonding between the chiplets.

5) The other aspect is thermal where the assembly needs to be cooled. Wire bonded assemblies are harder to cool, and the heat needs to be pulled out from the bottom, thru the PCB. In 2.5D integrated structures, the wire bonds are not “in the way”, and the heat can be channeled to the top through package lid, in addition to the PCB. This becomes important in the higher power, higher speed transceivers.

--> Bang on, POET has nailed that right on the head

6)  Fig. 7(d) shows the DFB laser resting on one such vertical alignment structure. The optical coupling loss is about 2.5 dB, largely due to the mismatch between the non-optimal, asymmetric DFB mode and the symmetric edge coupler input mode. Accurate alignment of the DFB to the silicon photonics coupler, and it’s subsequent soldering is a challenge.

--> POET is going to flip-chip their laser on the interposer with 0.3db coupling loss, 2.5db versus 0.3 db, hmmmmm I guess hyrid integration approach from POET is winning 10 times over the discussed heterogenous integration of this paper.

This Marvell's paper is exploring the way of how-to integrate... POET has done it !!!